The selection of power management ICs (PMICs) is a critical and complex task that directly affects the performance, reliability, cost, and time to market of electronic products. The following are the core points to pay attention to when selecting:
Core principle: Starting from system requirements and weighing comprehensively.
1、 Clarify system power requirements (starting point)
Input voltage range (Vin):
Determine the source of the power supply (battery, adapter, USB, PoE, etc.) and its voltage fluctuation range (such as battery fully charged/undervoltage, adapter tolerance).
It is necessary to ensure that PMIC can operate normally at both the lowest and highest input voltages.
Output voltage (Vout) and accuracy:
List all loads that require power supply and their required voltage values (such as 1.8V, 3.3V, 5V, 12V, etc.).
Clarify the accuracy requirements for each voltage rail (such as ± 3%, ± 1%). The higher the precision requirement, the higher the demand for PMIC and peripheral devices.
Output current (Iout):
Estimate or measure the current demand of each load under the worst-case scenario (peak), including surge current at startup.
Considering possible future load increases (margin design), PMICs with a rated current margin of 20% -50% are usually chosen.
Power budget and efficiency:
Calculate the total power consumption of the computing system and the power consumption of critical voltage rails.
Efficiency (η) is a key consideration: low efficiency can lead to severe heating and shortened battery life. Focus on the efficiency at typical operating points (input voltage, output voltage, load current).
Balance efficiency with cost and size (high-efficiency solutions may be more complex or expensive).
2、 Choose power conversion topology and architecture
Topology matching:
LDO (Low Dropout Linear Regulator): Low input and output voltage difference, extremely low noise, simple structure, and low cost. But the efficiency is low (η≈ Vout/Vin), the heat generation is large, and it is only suitable for scenarios with small pressure difference, low current, and sensitivity to noise (such as analog circuits and clock power supply).
Buck: High efficiency (especially when there is a large pressure difference), the most widely used. Used to reduce higher voltage to lower voltage.
Boost: Used to raise lower voltage to higher voltage (such as driving white LED backlight with battery powered devices).
Buck Boost: A scenario where the input voltage may be higher or lower than the output voltage (such as a single lithium battery power supply system requiring stable 3.3V output).
Charge Pump: It can achieve boost, buck, or negative pressure, has no inductance, and is small in size. But the output current capability is limited, the efficiency is moderate, and the output ripple may be large. Commonly used for small current bias voltage or LED driving.
Multi output PMIC: integrates multiple converters with different topologies (such as Buck+LDOs) to simplify design and save space. It is necessary to evaluate whether the integration meets the requirements and whether the flexibility is sufficient.
Control mode:
PWM (Pulse Width Modulation): Fixed frequency, high efficiency, good transient response, but light load efficiency may be lower (can be improved through PFM mode). The EMI spectrum is relatively concentrated.
PFM (Pulse Frequency Modulation): High efficiency under light load, low static current, but large output ripple, slow transient response, and wide EMI spectrum. Commonly used for battery powered devices.
DCS-Control ™, COT (Constant On Time) and other proprietary technologies developed by manufacturers to balance efficiency and transient response under different loads. It is necessary to understand its working principle and characteristics.
3、 Consideration of key performance parameters
Static current (Iq):
Refers to the current consumed by PMIC when maintaining its own operation (without load or with light load).
It is crucial for battery powered equipment, especially in standby mode, as it directly affects standby time. Pursuing extremely low Iq.
Switching frequency (Fsw):
Affects efficiency, size EMI。
High frequency: allows for the use of smaller inductors and capacitors (saving space), but increases switching losses (potentially reducing efficiency), posing greater EMI challenges.
Low frequency: Efficiency may be higher (especially at high currents), EMI is relatively easy to handle, but requires larger peripheral components.
Adjustable frequency/synchronization: beneficial for optimizing EMI or system clock synchronization.
Transient response:
The fluctuation amplitude and recovery time of the output voltage when the load current suddenly changes (such as MCU waking up from sleep).
It is crucial for dynamic loads such as high-speed processors and FPGAs. Attention should be paid to the transient response curve in the data manual.
Ripple and noise:
Switching ripple: caused by switching action, frequency is related to Fsw.
Output noise: including ripple and broadband noise.
Has a significant impact on sensitive circuits such as RF, ADC/DAC, PLL. LDO has the lowest noise, and switch mode power supplies need to pay attention to their noise indicators and filtering design.
Protection function:
Essential: overcurrent protection, over temperature protection.
Important: Overvoltage protection, undervoltage lockout, short circuit protection.
Optional: reverse current protection, input overvoltage protection, power supply normal signal.
Comprehensive protection is the cornerstone of system reliability.
4、 Physical characteristics and implementation considerations
Packaging and size:
Choose a package that fits the PCB layout space (such as QFN, WLCSP, BGA).
Packaging affects the heat dissipation capability and manufacturing process (such as whether bottom solder pads are required for heat dissipation).
Thermal management:
Estimate power loss (P_loss ≈ Pin Pout ≈ (Pout/η) - Pout).
Consider the thermal resistance of the package, PCB heat dissipation design (copper foil area, via), and ambient temperature.
Ensure that the junction temperature does not exceed the rated maximum value (to be calculated or simulated).
Requirements for peripheral components:
Inductance and capacitance: are key factors in cost, size, and performance. The PMIC data manual will provide a recommended range of values.
Consider the size, cost, availability (supply chain), and the impact of ESR/ESL parameters on performance (such as efficiency, ripple, stability) of these components.
Start timing and control:
Multi voltage rail systems require precise power on/off timing control (soft start, power sequencing).
Do you need control signals such as enablement and normal power supply? Do I need an I2C/SPI interface for dynamic voltage regulation?
5、 Cost and Supply Chain
Chip cost: Compare the total cost of different solutions (discrete, multi chip, integrated PMIC).
BOM cost: The cost and quantity of peripheral components, especially inductors and capacitors.
Accessibility and Lifecycle:
Ensure stable and reliable supply channels for key PMICs.
Pay attention to the lifecycle status of devices (new products, mass production, discontinuation notifications).
Avoid using components that are about to be phased out or difficult for small factories to purchase.
Minimum order quantity: Whether it meets the procurement requirements of the project.
6、 Design support and validation
Manufacturer's tools:
Do you provide selection tools, reference designs, simulation models (such as PSpice), and evaluation boards?
The evaluation board is the key to quickly verifying performance.
Design resources:
Are the data manual, application notes, and design guidelines clear and detailed?
Technical support:
What is the technical support capability of the manufacturer or agent? Response speed?
Certification and Standards:
Does the product need to meet specific industry standards (such as automotive AEC-Q100, industrial temperature range)?
Summary of Selection Process
Detailed definition of requirements: Clearly list all input and output parameters, performance targets (efficiency, noise, static current), environmental conditions (temperature), size limitations, and cost targets.
Topology screening: Based on the input-output relationship (step-down/step-up/step-down), current size, efficiency and noise requirements, preliminarily determine the appropriate topology (LDO/Buck/Boost/Buck Boost) for each voltage rail.
Device search and preliminary selection: Use manufacturer website selection tools, distributor platforms, and industry reports to screen candidate devices based on core parameters (Vin/VOut/Iout/FSw/packaging).
In depth evaluation and comparison:
Carefully read the data manual and pay attention to the key performance curves (efficiency vs load/input voltage, transient response, ripple noise).
Calculate thermal performance (junction temperature).
Evaluate the complexity and cost of peripheral components.
Compare integration (multi output PMIC vs multiple single chip).
Evaluate design resources (reference designs, evaluation boards) and supply chain risks.
Obtaining evaluation board testing: very important! Test key performance indicators (efficiency, ripple, noise, transient response, temperature rise) as closely as possible to actual application conditions.
Final decision: Taking into account factors such as performance, cost, size, reliability, supply chain, and design complexity, make the optimal choice.
Remember: there is no "best" PMIC, only the PMIC that is "most suitable" for the current specific project requirements. A deep understanding of system requirements, careful weighing of various factors, and verification through actual evaluation boards are the key to successful selection.